1. Field of the Invention
The present invention relates to a thin film transistor, a method of fabricating the same, and a flat panel display device including the same.
2. Description of the Related Art
A flat panel display device such as an organic light emitting display device or a liquid crystal display device includes N×M unit pixels disposed in a matrix format. The flat panel display device may be classified as a passive matrix type or an active matrix type according to the driving method of the N×M unit pixels. In the active matrix type flat panel display device, a unit pixel region includes a pixel electrode for defining an emission region and a unit pixel driving circuit for applying a current or voltage to the pixel electrode. The unit pixel driving circuit includes at least one thin film transistor.
Generally, such a thin film transistor includes a semiconductor layer, a gate electrode, and source and drain electrodes. Source and drain regions are formed at respective sides of the semiconductor layer, and a channel region is interposed between the source and drain regions. The semiconductor layer may be formed of polycrystalline silicon or amorphous silicon. However, since electron mobility of the polycrystalline silicon is higher than that of the amorphous silicon, the polycrystalline silicon is more widely used.
A thin film transistor formed of the polycrystalline silicon has a large off-current in comparison with a thin film transistor formed of the amorphous silicon. In order to solve the problem of the thin film transistor formed of the polycrystalline silicon having large off-current, a structure in which a lightly doped region is disposed between the source and drain regions, i.e., heavily doped regions, and the channel region of the thin film transistor formed of the polycrystalline silicon, namely, a lightly doped drain (LDD) structure, has been proposed. The LDD region is effective to suppress a hot carrier effect (HCE) that is one of short channel effects (SCE). The hot carrier effect means that reduction of the channel length of the thin film transistor causes carriers having high energy, i.e., hot carriers, to occur by an electric field abruptly increased between the drain region and the channel region on driving the thin film transistor. The hot carriers may be injected into a gate insulating layer to damage the gate insulating layer, and cause a trap in the gate insulating layer, thereby deteriorating the thin film transistor. Therefore, the LDD regions are formed between the channel region and the source and drain regions to prevent the electric field from abruptly increasing, thereby preventing generation of the hot carriers. In addition, as the concentration of impurities in the LDD region is lowered, the hot carrier effect is further suppressed.
FIG. 1 is a cross-sectional view of a conventional thin film transistor.
Referring to FIG. 1, a buffer layer 110 is formed on a substrate 100, and an amorphous silicon layer is formed on the buffer layer 110. The amorphous silicon layer is crystallized to form a polycrystalline silicon layer, and then patterned to form a semiconductor layer 120. In addition, a channel doping process is performed on the semiconductor layer 120.
Then, a gate insulating layer 130 is formed on the entire surface of the substrate including the semiconductor layer 120, and a gate electrode material is formed on the gate insulating layer 130. Next, the gate electrode material is patterned to form a gate electrode 140 using an etching mask.
An ion doping process is performed using the etching mask disposed on the gate electrode 140 as an ion implantation mask to form lightly doped drain (LDD) regions 122. At this time, a region between the LDD regions 122 in the semiconductor layer 120 is referred to as a channel region 123.
A photoresist pattern is disposed on the gate insulating layer 130 and the gate electrode 140 corresponding to portions of the LDD regions 122 adjacent to the channel region 123, and then an ion doping process is performed using the photoresist pattern as a mask, thereby forming source and drain regions 121. As a result, the semiconductor layer 120 including the source and drain regions 121, the LDD regions 122, and the channel region 123 is completed.
An interlayer insulating layer 150 is formed on the entire surface of the substrate including the gate electrode 140. The interlayer insulating layer 150 is etched to form contact holes 150a to expose the source and drain regions 121.
Source and drain electrodes 160 connected, respectively, to the source and drain regions 121 through the respective contact holes 150a are formed. As a result, the thin film transistor including the semiconductor layer, the gate electrode, and the source and drain electrodes is completed.
However, in order to form the LDD regions and the source and drain regions in the semiconductor layer of the conventional thin film transistor, the ion doping process is performed twice using two masks. As a result, manufacturing cost is increased, processes are complicated, and productivity is decreased due to the complicated processes.